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Senior Security Engineer

Apple, Inc.

Worked on both hardware and software relating to iPhone and Macintosh security.

• Added system call and Mach IPC filtering in the kernel application sandbox (aka, 'Seatbelt')
• Created CHERI-Qemu to support CHERI research and development on the ARMv8 architecture (AARCH64)
• Created an CHERI ARMv8 test suit
• Modified QEMU to support iOS development.
• Modified internal emulator to support CHERI.
• Evaluation of ARM pointer authenication (PAC).
• Evaluation of Memory Taggging Extension (MTE) and other ARM hardware proposed extensions.

Engineering Consultant and Researcher

University of Cambridge

Worked on the DARPA C.R.A.S.H. (Clean-slate design of Resilient, Adaptive, Secure, Hosts) funded CHERI (Capability Hardware Enhanced RISC Instructions) project.

• New PMAP implementation for FreeBSD/mips64 including reference bit emulation, large pages for kernel thread stack, and Superpages.
• Performance counters support and general feature evaluation.
• Thread Local Storage (TLS) register support for FreeBSD/mips.

Engineering Consultant and Researcher

SRI International

Worked on the DARPA C.R.A.S.H. (Clean-slate design of Resilient, Adaptive, Secure, Hosts) funded CHERI (Capability Hardware Enhanced RISC Instructions) project.

• Created CHERI-QEMU, an adaptation of the popular QEMU ISA emulator to implement the CHERI-MIPS instruction set.
• General FreeBSD/mips64 OS bring-up and kernel feature support on CHERI prototype target (FPGA based tablet implemented using Bluespec SystemVerilog).
• Added FreeBSD user-mode support to Qemu for cross building and cross development code with machine dependent support for ARM, ARM64, Mips and Mips64.
• Created miscellaneous binaries image activator kernel module for FreeBSD for transparent execution of target binaries on x86 host.

Core OS Security Engineering Consultant

Apple, Inc.

Worked on experimential VM subsystem in MacOS/iOS, kernel and system code for government FIPS 140.2 and common criteria certification, and Apple's 'Seatbelt' (Application sandboxing subsystem).

• Created VM subsystem unit tests. Code signing code testing and evaluation.
• Added common criteria auditing to Apple’s Gatekeeper policy updates.
• Developed an OpenSSL compatible API shim for Apple’s CommonCrypto.
• Worked on application sandboxing for Mac OS X, added debugger support for sandbox exceptions, and sandboxed iChat/Messages app.
• Created sandbox and privilege separation example apps for WWDC.
• Created the CommonCrypto kernel extension (“KEXT”) for MacOS/iOS.
• Created validation suites for FIPS 140-2 certification for the CommonCrypto KEXT.
• Updated Core OS security auditing subsystem to meet the Common Criteria for Information Technology Security Evaluation version 3.1 (CC v3.1), evaluation assurance level 3 (EAL3).
• Added performance enhancements so minimal security auditing can be enabled by default without any measurable overhead.
• Incorporated OpenBSM v1.1 into Mac OS X 10.6 (Snow Leopard).
• Added Launchd integration for user level security auditing support.
• Developed Core OS security audit session tracking for securityd and launchd including kevent(2) notifications and capability-based security.
• Developed Abstract Machine Testing (AMT) software.
• Added flexible storage and management features for audit record storage including aggregation of records from multiple systems, log rotation, and record expiration and deletion.
• Developed a Python extension and framework for unit testing the audit subsystem.
• Identified fixes and developed resolutions for Radars (Apple’s bug reports) associated with the project. Communicated with Apple engineering contacts as necessary. Worked and communicated with ADC developers.

Cloud/Hosting Chief Architect

NTT/Verio

Managed R&D group that prototyped new server cloud architectures and products.

• Developed Linux VPS/Cloud prototype
• Help design and implement system call, disk I/O, and network rate limiting in FreeBSD.
• Architected SAN storage system for hosting server clusters.
• Created TCP/IP stack state “hand-off” for network load balancing between servers for FreeBSD.

VP, Hosting Technology

Verio, Inc.

After successsful merger managed hosting technology development.

• Managed the hosting technology software development group.
• Added intrusion detection to the hosting systems by adding a setuid registration FreeBSD extension.
• Modified the GCC compiler to detect and prevent stack buffer overruns.
• Helped architected and implement virtlinks to increase code segment sharing between VPS’s.
• Helped port VPS software to Solaris 2.6.

Co-Founder and CTO

iServer and Secure.net

Started a successful cloud computing/hosting company based process container technology.

• Technical founder, innovator of core technology, manager of R&D group.
• Created OS-level virtualization (VPS) using BSD/OS for web hosting (including process containers, network isolation, and resource limits).
• Implemented a “super” inetd that started network services for each VPS on demand and allowed code segment sharing to save memory resources.
• Helped develop X.509 management kernel module so wild card certificates can be securely shared between VPS’s.
• Helped design and develop server power and console management hardware; help port embedded FreeBSD to embedded controller.
• Added multi-layer quotas so quotas can be used within VPS.
• Successfully merged iServer, Inc. with Verio, Inc. in a stock swap deal. Helped take Verio, Inc public. All the outstanding stock was then sold to NTT Communications.

Developer/Technical Consultant

AccessData, Inc

Part-time developer and consultant

• Created password recovery software for WordPerfect, Norton’s Discreet, and other popular desktop/server applications with encryption features..
• Built hardware DES encryption/decryption engine for FBI using FPGAs.
• Was a consultant to government agencies including FBI/DoJ, Teasury Department/IRS and other law enforcement departments.

Systems Programmer, Researcher, CAEDM Lab Manager

Brigham Young University, College of Engineering

Part-time and full-time jobs while studying at BYU, College of Engineering.

• Managed college’s network, computers systems & supercomputers.
• Supervised full-time and part-time IT staff for all computer systems in college.
• Implemented disk cache prefetching algorithm on BSD Unix System.
• Measured overhead of Mach 3.0 syscall redirection on cache performance.
• Developed distributed batch queuing and process checkpointing software. Published Paper: 'Efficient Utilization of Distributed Workstation Resources' in Proceedings of The Ninth Annual Conference on University Programs in Computer-Aided Engineering, Design and Manurfacturing (UPCADEM '91), May 16-18, 1991

Kernel/System Developer

FreeBSD and TrustedBSD Contributer

Contributed code development for FreeBSD kernel and TrustedBSD projects.

• Added user-mode support to Qemu for FreeBSD and kernel module for transparent binary execution to support cross building of packages for tier 2 architectures include ARM, ARM64, MIPS and MIPS64. Now being used in production on package build cluster.
• Grand Central Dispatch (GCD) port: kevent(2) EVFILT_USER filter and thread workqueues.
• /dev/ksyms: pseudo device for attaining kernel and module symbol table snapshot.
• OpenBSM: Open implementation of Sun’s Basic Security Module (BSM) security audit API.
• Mandatory Access Control (MAC).
• •AoE (ATA over Ethernet) driver.

Masters of Science

Brigham Young University

Computer Engineering

• Left PhD program to work at my startup. Settled for MS.

Bachelor of Science

Brigham Young University

Electrical Engineering

• Notable Math Courses: Number Theory, Abstract Algebra, Numerical Methods
• Notable CS Courses: Operating Systems, Compilers, Computer Security

5 Year Service Award - Apple, Inc

Apple, Inc

ASPLOS 2019 Best Paper Award

The 24th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

10 Year Service Award - Verio/NTT

Verio/NTT

Selected Member of BYU Advisory Council for Engineering College

Brigham Young University, College of Engineering

Selected member of Utah Technology Board

State of Utah, Governor Mike Leavitt

5 Year Service Award - BYU College of Engineering

Brigham Young University, College of Engineering

Student Teacher of the Year - BYU College of Engineering

BYU College of Engineering, ECEn Department

Dean's Academenic List and Scholarship

BYU College of Engineering, ECEn Department

Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 9)

University of Cambridge

CHERI architecture

Cornucopia: Temporal Safety for CHERI Heaps

2020 IEEE Symposium on Security and Privacy (SP)

Using CHERI for temperal memory safety.

CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment

2019 Twenty Fourth International Conference on Architectural Support for Programming Languages and Operating Systems

The CHERI architecture allows pointers to be implemented as capabilities (rather than integer virtual addresses) in a manner that is compatible with, and strengthens, the seman- tics of the C language. This paper describes the first adaptation of a full C-language operating system (FreeBSD) with an enterprise database (PostgreSQL) for complete spatial and referential memory safety.

CHERI JNI: Sinking the Java security model into the C

2017 Twenty Second International Conference on Architectural Support for Programming Languages and Operating Systems

This paper shows that it is possible to preserve the memory safety and isolation requirements of the Java security model in C code, allowing native code to run in the same process as Java code with the same impact on security as running equivalent Java code.

Efficient Tagged Memory

2017 IEEE International Conference on Computer Design (ICCD)

This paper describes the tag memory cache design decisions for CHERI.

Fast Protection-Domain Crossing in the CHERI Capability-System Architecture

IEEE Micro

This article describes ISA additions to CHERI that support fast protection-domain switching, not only in terms of low cycle count, but also efficient memory sharing with mutual distrust.

CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization

2015 IEEE Symposium on Security and Privacy

CHERI extends a conventional RISC Instruction- Set Architecture, compiler, and operating system to support fine-grained, capability-based memory protection to mitigate memory-related vulnerabilities in C-language TCBs. We describe how CHERI capabilities can also underpin a hardware-software object-capability model for application compartmentalization that can mitigate broader classes of attack.